Certain types of integrated circuits such as dynamic and static random access memories can be speed sorted. The fast devices can then be sold at a premium to those customers who require high speed parts. The slower devices can then be sold to customers who do not have such a high speed requirement. This is conventional in the industry.
The power consumption of an integrated circuit is typically related to its speed. That is, the greater the speed the greater the power consumption. Therefore there is often a tradeoff between the speed of a part and the power it consumes.
Read only memory (ROM) circuits are fabricated with a customer bit pattern that is unique for each customer. In a sale to a customer purchasing a ROM circuit there is generally designated a minimum operating speed for the part. When the ROM circuits are tested those circuits that do not meet this minimal requirement cannot be used for any purpose and therefore must be discarded. This can constitute a substantial overhead expense for the manufacturer of ROM circuits. A basic ROM circuit is typically designed for the widest application and then custom programmed for each individual customer application. In this case the basic circuit must have a speed capability sufficiently fast for that of the most demanding customer. Since the economies of manufacturing require one basic manufacturing process, all of the customers must receive the same basic part. Therefore many of the customers receive parts that operate at a much higher speed and consume much more power than they require. The custom design of parts would be far too expensive in this market.
In view of the problems encountered in the manufacturing of read only memories and similar type circuits, there exists a need for a circuit which can be custom produced to have any of a wide range of speed and power consumption parameters while at the same time utilizing one basic ROM circuit which is manufactured in a conventional process.